Kitchen Gadget Inspires Scientist to Make More Effective Plastic Electronics

Fabricating single crystal organic field-effect transistors using ultra-thin polymer membrane for a gate insulator. In the upper row, the membrane is stretched over the transistor before vacuum is applied. In the lower row, the vacuum has been applied and the membrant is adhering to the organic crystal. Photos on the right are close-up views of the transistor, with the organic semiconductor crystal in red. (Credit: Credit: H. T. Yi, et. al.)

One day in 2010, Rutgers physicist Vitaly Podzorov watched a store employee showcase a kitchen gadget that vacuum-seals food in plastic. The demo stuck with him. The simple concept -- an airtight seal around pieces of food -- just might apply to his research: developing flexible electronics using lightweight organic semiconductors for products such as video displays or solar cells.

"Organic transistors, which switch or amplify electronic signals, hold promise for making video displays that bend like book pages or roll and unroll like posters," said Podzorov. But traditional methods of fabricating a part of the transistor known as the gate insulator often end up damaging the transistor's delicate semiconductor crystals.

Drawing inspiration from the food-storage gadget, Podzorov and his colleagues tried an experiment. They suspended a thin polymer membrane above the organic crystal and created a vacuum underneath, causing the membrane to collapse gently and evenly onto the crystal's surface. The result: a smooth, defect-free interface between the organic semiconductor and the gate insulator.

The researchers reported their success in the journal Advanced Materials. In the article,Podzorov and three colleagues describe how a single-crystal organic field effect transistor (OFET) made with this thin polymer gate insulator boosted electrical performance. The researchers further reported that they could remove and reapply membranes to the same crystal several times without degrading its surface.

Organic transistors electrically resemble silicon transistors in computer chips, but they are made of flexible carbon-based molecules that can be printed on sheets of plastic. Silicon transistors are made in rigid, brittle wafers of silicon.

The methods that scientists previously applied to organic transistor fabrication were based on silicon semiconductor processing, explained Podzorov, assistant professor in the Department of Physics and Astronomy, School of Arts and Sciences. These involved high temperatures, high-energy plasmas or chemical reactions, all of which could damage the delicate organic crystal surface and hinder the transistor's performance.

"People have tendencies to go with something they've known for a long time," he said. "In this case, it doesn't work right."

Podzorov's innovation builds upon a decade of Rutgers research in this field, including his invention of the first single crystal organic transistor in 2003. While his latest innovation is still a ways from commercial reality, he sees an immediate application in the classroom.

"Our technique takes 10 minutes," he said. "It should be exciting for students to actually build these devices and immediately see them work, all within one lab session."

Podzorov was actually trying to solve another problem when he first recalled the food packaging demo. He was thinking about how to protect organic crystals from airborne impurities when his lab shipped samples to collaborating scientists in California and overseas.

"We could place our samples between plastic sheets and pull a vacuum," he said. "Then I thought, 'why don't we try doing this for our gate insulator?'"

Funding for the research was provided by the U. S. Department of Energy and the Rutgers Institute for Advanced Materials and Devices for Nanotechnology. Collaborators in Podzorov's lab were postdoctoral researchers Hee Taek Yi and Yuanzhen Chen, and undergraduate student Krzysztof Czelen. The department's machine shop made a custom-designed vacuum chamber for the project

Story Source:

The above story is reprinted from materials provided byRutgers University.

Note: Materials may be edited for content and length. For further information, please contact the source cited above.

---

Journal Reference:

1. H. T. Yi, Y. Chen, K. Czelen, V. Podzorov. Vacuum Lamination Approach to Fabrication of High-Performance Single-Crystal Organic Field-Effect Transistors. Advanced Materials, 2011; 23 (48): 5807 DOI:10.1002/adma.201103305

Intel to Mass-Produce New 3-D Transistors for Faster, More Efficient Computer Chips

3-D Transistor This image shows the vertical fins of Intel’s 22 nanometer microprocessor using 3-D Tri-Gate transistors. Intel
In a move that could remake the microchip industry, Intel announced Wednesday it will start mass-producing the first three-dimensional silicon transistors. The 3-D transistor design, which Intel says will improve efficiency by more than one-third, will be integrated into a 22-nanometer node in an Intel chip called Ivy Bridge.
It’s a major change from the two-dimensional flat transistor structure we all know and love, which has powered every computer chip for the last 50 years. The 3-D switch design and the scale of its production will allow Moore’s Law to advance apace, Intel said.
Moore’s Law holds that the number of transistors that can be placed on a circuit will double every two years, but this places limits on the circuits’ size — a growing problem as engineers cram greater numbers of transistors onto ever-tinier chips. A 3-D switch could allow computer chips to be built like skyscrapers, optimizing space by building upward, and thereby allowing uninhibited transistor growth.
The Tri-Gate transistors consist of a thin 3-D silicon fin that arises vertically from the silicon substrate, Intel explains. Each fin has three gates, one on the top and one on each side, which allows for greater transistor current control. When it’s on, current flow is more efficient, and when the switches are off, the flow of electrons is closer to zero. By contrast, flat transistors have one gate, only on top.
All this leads to greater efficiency, allowing chips to operate at a lower voltage and with lower leakage — Intel claims a whopping 37 percent performance increase over its 2-D chips. Since the fins and their gates are vertical, more transistors can be packed close together. Eventually, designers will be able to make taller fins, aiming for even better performance.
“It will give product designers the flexibility to make current devices smarter and wholly new ones possible,” said Mark Bohr, a senior fellow at Intel.
More than 6 million 22-nm Tri-Gate transistors could fit inside the period at the end of this sentence, according to the company. (If you zoom in, who knows how many could fit!)
The new transistors will be integrated into Ivy Bridge-based Intel Core processors by the end of this year, which consumers will be able to get in 2012, Intel said.
Plenty of other chip designers have been talking about 3-D chips — just last month, we saw a 2-D reprogrammable one designed to behave as if it was a 3-D one. But Intel has taken it a step further by figuring out how to mass-produce them.
It’s technically 3-D because the switches are vertical and horizontal, but the transistors are not stacked, allowing electrons to flow in three dimensions — that’s a holy Grail of microprocessor design. But a new circuit design that allows more transistors on tinier spaces certainly sounds like a major breakthrough.
[IBM via PC Magazine]

View the original article here

Team reports scalable fabrication of self-aligned graphene transistors, circuits

ScienceDaily (June 16, 2011) — Graphene, a one-atom-thick layer of graphitic carbon, has the potential to make consumer electronic devices faster and smaller. But its unique properties, and the shrinking scale of electronics, also make graphene difficult to fabricate and to produce on a large scale.

In September 2010, a UCLA research team reported that they had overcome some of these difficulties and were able to fabricate graphene transistors with unparalleled speed. These transistors used a nanowire as the self-aligned gate -- the element that switches the transistor between various states. But the scalability of this approach remained an open question.

Now the researchers, using equipment from the Nanoelectronics Research Facility and the Center for High Frequency Electronics at UCLA, report that they have developed a scalable approach to fabricating these high-speed graphene transistors.

The team used a dielectrophoresis assembly approach to precisely place nanowire gate arrays on large-area chemical vapor deposition-growth graphene -- as opposed to mechanically peeled graphene flakes -- to enable the rational fabrication of high-speed transistor arrays. They were able to do this on a glass substrate, minimizing parasitic delay and enabling graphene transistors with extrinsic cut-off frequencies exceeding 50 GHz. Typical high-speed graphene transistors are fabricated on silicon or semi-insulating silicon carbide substrates that tend to bleed off electric charge, leading to extrinsic cut-off frequencies of around 10 GHz or less.

Taking an additional step, the UCLA team was able to use these graphene transistors to construct radio-frequency circuits functioning up to 10 GHz, a substantial improvement from previous reports of 20 MHz.

The research opens a rational pathway to scalable fabrication of high-speed, self-aligned graphene transistors and functional circuits and it demonstrates for the first time a graphene transistor with a practical (extrinsic) cutoff frequency beyond 50 GHz.

This represents a significant advance toward graphene-based, radio-frequency circuits that could be used in a variety of devices, including radios, computers and mobile phones. The technology might also be used in wireless communication, imaging and radar technologies.

The UCLA research team included Xiangfeng Duan, professor of chemistry and biochemistry; Yu Huang, assistant professor of materials science and engineering at the Henry Samueli School of Engineering and Applied Science; Lei Liao; Jingwei Bai; Rui Cheng; Hailong Zhou; Lixin Liu; and Yuan Liu.

Duan and Huang are also researchers at the California NanoSystems Institute at UCLA.

The work was funded by grants from National Science Foundation and the National Institutes of Health.

The research was recently published in the peer-reviewed journal Nano Letters.

Story Source:

The above story is reprinted (with editorial adaptations by ScienceDaily staff) from materials provided by University of California - Los Angeles. The original article was written by Mike Rodewald.

Journal Reference:

Lei Liao, Jingwei Bai, Rui Cheng, Hailong Zhou, Lixin Liu, Yuan Liu, Yu Huang, Xiangfeng Duan. Scalable fabrication of self-aligned graphene transistors and circuits on glass. Nano Letters, 2011; 110607115253088 DOI: 10.1021/nl201922c

Note: If no author is given, the source is cited instead.

Disclaimer: Views expressed in this article do not necessarily reflect those of ScienceDaily or its staff.

View the original article here

Transistors reinvented using new 3-D structure

ScienceDaily (May 5, 2011) — Intel Corporation has announced a significant breakthrough in the evolution of the transistor, the microscopic building block of modern electronics. For the first time since the invention of silicon transistors over 50 years ago, transistors using a three-dimensional structure will be put into high-volume manufacturing. Intel will introduce a revolutionary 3-D transistor design called Tri-Gate, first disclosed by Intel in 2002, into high-volume manufacturing at the 22-nanometer (nm) node in an Intel chip codenamed "Ivy Bridge." A nanometer is one-billionth of a meter.

The three-dimensional Tri-Gate transistors represent a fundamental departure from the two-dimensional planar transistor structure that has powered not only all computers, mobile phones and consumer electronics to-date, but also the electronic controls within cars, spacecraft, household appliances, medical devices and virtually thousands of other everyday devices for decades.

"Intel's scientists and engineers have once again reinvented the transistor, this time utilizing the third dimension," said Intel President and CEO Paul Otellini. "Amazing, world-shaping devices will be created from this capability as we advance Moore's Law into new realms."

Scientists have long recognized the benefits of a 3-D structure for sustaining the pace of Moore's Law as device dimensions become so small that physical laws become barriers to advancement. The key to this latest breakthrough is Intel's ability to deploy its novel 3-D Tri-Gate transistor design into high-volume manufacturing, ushering in the next era of Moore's Law and opening the door to a new generation of innovations across a broad spectrum of devices.

Moore's Law is a forecast for the pace of silicon technology development that states that roughly every 2 years transistor density will double, while increasing functionality and performance and decreasing costs. It has become the basic business model for the semiconductor industry for more than 40 years.

Unprecedented Power Savings and Performance Gains

Intel's 3-D Tri-Gate transistors enable chips to operate at lower voltage with lower leakage, providing an unprecedented combination of improved performance and energy efficiency compared to previous state-of-the-art transistors. The capabilities give chip designers the flexibility to choose transistors targeted for low power or high performance, depending on the application.

The 22nm 3-D Tri-Gate transistors provide up to 37 percent performance increase at low voltage versus Intel's 32nm planar transistors. This incredible gain means that they are ideal for use in small handheld devices, which operate using less energy to "switch" back and forth. Alternatively, the new transistors consume less than half the power when at the same performance as 2-D planar transistors on 32nm chips.

"The performance gains and power savings of Intel's unique 3-D Tri-Gate transistors are like nothing we've seen before," said Mark Bohr, Intel Senior Fellow. "This milestone is going further than simply keeping up with Moore's Law. The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next. It will give product designers the flexibility to make current devices smarter and wholly new ones possible. We believe this breakthrough will extend Intel's lead even further over the rest of the semiconductor industry."

Continuing the Pace of Innovation -- Moore's Law

Transistors continue to get smaller, cheaper and more energy efficient in accordance with Moore's Law -- named for Intel co-founder Gordon Moore. Because of this, Intel has been able to innovate and integrate, adding more features and computing cores to each chip, increasing performance, and decreasing manufacturing cost per transistor.

Sustaining the progress of Moore's Law becomes even more complex with the 22nm generation. Anticipating this, Intel research scientists in 2002 invented what they called a Tri-Gate transistor, named for the three sides of the gate. This announcement follows further years of development in Intel's highly coordinated research-development-manufacturing pipeline, and marks the implementation of this work for high-volume manufacturing.

The 3-D Tri-Gate transistors are a reinvention of the transistor. The traditional "flat" two-dimensional planar gate is replaced with an incredibly thin three-dimensional silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin -- two on each side and one across the top -- rather than just one on top, as is the case with the 2-D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the "on" state (for performance), and as close to zero as possible when it is in the "off" state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).

Just as skyscrapers let urban planners optimize available space by building upward, Intel's 3-D Tri-Gate transistor structure provides a way to manage density. Since these fins are vertical in nature, transistors can be packed closer together, a critical component to the technological and economic benefits of Moore's Law. For future generations, designers also have the ability to continue growing the height of the fins to get even more performance and energy-efficiency gains.

"For years we have seen limits to how small transistors can get," said Moore. "This change in the basic structure is a truly revolutionary approach, and one that should allow Moore's Law, and the historic pace of innovation, to continue."

World's First Demonstration of 22nm 3-D Tri-Gate Transistors

The 3-D Tri-Gate transistor will be implemented in the company's upcoming manufacturing process, called the 22nm node, in reference to the size of individual transistor features. More than 6 million 22nm Tri-Gate transistors could fit in the period at the end of this sentence.

Intel has demonstrated the world's first 22nm microprocessor, codenamed "Ivy Bridge," working in a laptop, server and desktop computer. Ivy Bridge-based Intel® Core™ family processors will be the first high-volume chips to use 3-D Tri-Gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.

This silicon technology breakthrough will also aid in the delivery of more highly integrated Intel® Atom™ processor-based products that scale the performance, functionality and software compatibility of Intel® architecture while meeting the overall power, cost and size requirements for a range of market segment needs.

Story Source:

The above story is reprinted (with editorial adaptations by ScienceDaily staff) from materials provided by Intel Corporation.

Note: If no author is given, the source is cited instead.

Disclaimer: Views expressed in this article do not necessarily reflect those of ScienceDaily or its staff.

View the original article here

Transistors reinvented using new 3-D structure

ScienceDaily (May 5, 2011) — Intel Corporation has announced a significant breakthrough in the evolution of the transistor, the microscopic building block of modern electronics. For the first time since the invention of silicon transistors over 50 years ago, transistors using a three-dimensional structure will be put into high-volume manufacturing. Intel will introduce a revolutionary 3-D transistor design called Tri-Gate, first disclosed by Intel in 2002, into high-volume manufacturing at the 22-nanometer (nm) node in an Intel chip codenamed "Ivy Bridge." A nanometer is one-billionth of a meter.

The three-dimensional Tri-Gate transistors represent a fundamental departure from the two-dimensional planar transistor structure that has powered not only all computers, mobile phones and consumer electronics to-date, but also the electronic controls within cars, spacecraft, household appliances, medical devices and virtually thousands of other everyday devices for decades.

"Intel's scientists and engineers have once again reinvented the transistor, this time utilizing the third dimension," said Intel President and CEO Paul Otellini. "Amazing, world-shaping devices will be created from this capability as we advance Moore's Law into new realms."

Scientists have long recognized the benefits of a 3-D structure for sustaining the pace of Moore's Law as device dimensions become so small that physical laws become barriers to advancement. The key to this latest breakthrough is Intel's ability to deploy its novel 3-D Tri-Gate transistor design into high-volume manufacturing, ushering in the next era of Moore's Law and opening the door to a new generation of innovations across a broad spectrum of devices.

Moore's Law is a forecast for the pace of silicon technology development that states that roughly every 2 years transistor density will double, while increasing functionality and performance and decreasing costs. It has become the basic business model for the semiconductor industry for more than 40 years.

Unprecedented Power Savings and Performance Gains

Intel's 3-D Tri-Gate transistors enable chips to operate at lower voltage with lower leakage, providing an unprecedented combination of improved performance and energy efficiency compared to previous state-of-the-art transistors. The capabilities give chip designers the flexibility to choose transistors targeted for low power or high performance, depending on the application.

The 22nm 3-D Tri-Gate transistors provide up to 37 percent performance increase at low voltage versus Intel's 32nm planar transistors. This incredible gain means that they are ideal for use in small handheld devices, which operate using less energy to "switch" back and forth. Alternatively, the new transistors consume less than half the power when at the same performance as 2-D planar transistors on 32nm chips.

"The performance gains and power savings of Intel's unique 3-D Tri-Gate transistors are like nothing we've seen before," said Mark Bohr, Intel Senior Fellow. "This milestone is going further than simply keeping up with Moore's Law. The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next. It will give product designers the flexibility to make current devices smarter and wholly new ones possible. We believe this breakthrough will extend Intel's lead even further over the rest of the semiconductor industry."

Continuing the Pace of Innovation -- Moore's Law

Transistors continue to get smaller, cheaper and more energy efficient in accordance with Moore's Law -- named for Intel co-founder Gordon Moore. Because of this, Intel has been able to innovate and integrate, adding more features and computing cores to each chip, increasing performance, and decreasing manufacturing cost per transistor.

Sustaining the progress of Moore's Law becomes even more complex with the 22nm generation. Anticipating this, Intel research scientists in 2002 invented what they called a Tri-Gate transistor, named for the three sides of the gate. This announcement follows further years of development in Intel's highly coordinated research-development-manufacturing pipeline, and marks the implementation of this work for high-volume manufacturing.

The 3-D Tri-Gate transistors are a reinvention of the transistor. The traditional "flat" two-dimensional planar gate is replaced with an incredibly thin three-dimensional silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin -- two on each side and one across the top -- rather than just one on top, as is the case with the 2-D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the "on" state (for performance), and as close to zero as possible when it is in the "off" state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).

Just as skyscrapers let urban planners optimize available space by building upward, Intel's 3-D Tri-Gate transistor structure provides a way to manage density. Since these fins are vertical in nature, transistors can be packed closer together, a critical component to the technological and economic benefits of Moore's Law. For future generations, designers also have the ability to continue growing the height of the fins to get even more performance and energy-efficiency gains.

"For years we have seen limits to how small transistors can get," said Moore. "This change in the basic structure is a truly revolutionary approach, and one that should allow Moore's Law, and the historic pace of innovation, to continue."

World's First Demonstration of 22nm 3-D Tri-Gate Transistors

The 3-D Tri-Gate transistor will be implemented in the company's upcoming manufacturing process, called the 22nm node, in reference to the size of individual transistor features. More than 6 million 22nm Tri-Gate transistors could fit in the period at the end of this sentence.

Intel has demonstrated the world's first 22nm microprocessor, codenamed "Ivy Bridge," working in a laptop, server and desktop computer. Ivy Bridge-based Intel® Core™ family processors will be the first high-volume chips to use 3-D Tri-Gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.

This silicon technology breakthrough will also aid in the delivery of more highly integrated Intel® Atom™ processor-based products that scale the performance, functionality and software compatibility of Intel® architecture while meeting the overall power, cost and size requirements for a range of market segment needs.

Story Source:

The above story is reprinted (with editorial adaptations by ScienceDaily staff) from materials provided by Intel Corporation.

Note: If no author is given, the source is cited instead.

Disclaimer: Views expressed in this article do not necessarily reflect those of ScienceDaily or its staff.

View the original article here

Toward faster transistors: Physicists discover physical phenomenon that could boost computers' clock speed

ScienceDaily (May 15, 2011) — In the 1980s and '90s, competition in the computer industry was all about "clock speed" -- how many megahertz, and ultimately gigahertz, a chip could boast. But clock speeds stalled out almost 10 years ago: Chips that run faster also run hotter, and with existing technology, there seems to be no way to increase clock speed without causing chips to overheat.

In this week's issue of the journal Science, MIT researchers and their colleagues at the University of Augsburg in Germany report the discovery of a new physical phenomenon that could yield transistors with greatly enhanced capacitance -- a measure of the voltage required to move a charge. And that, in turn, could lead to the revival of clock speed as the measure of a computer's power.

In today's computer chips, transistors are made from semiconductors, such as silicon. Each transistor includes an electrode called the gate; applying a voltage to the gate causes electrons to accumulate underneath it. The electrons constitute a channel through which an electrical current can pass, turning the semiconductor into a conductor.

Capacitance measures how much charge accumulates below the gate for a given voltage. The power that a chip consumes, and the heat it gives off, are roughly proportional to the square of the gate's operating voltage. So lowering the voltage could drastically reduce the heat, creating new room to crank up the clock.

MIT Professor of Physics Raymond Ashoori and Lu Li, a postdoc and Pappalardo Fellow in his lab -- together with Christoph Richter, Stefan Paetel, Thilo Kopp and Jochen Mannhart of the University of Augsburg -- investigated the unusual physical system that results when lanthanum aluminate is grown on top of strontium titanate. Lanthanum aluminate consists of alternating layers of lanthanum oxide and aluminum oxide. The lanthanum-based layers have a slight positive charge; the aluminum-based layers, a slight negative charge. The result is a series of electric fields that all add up in the same direction, creating an electric potential between the top and bottom of the material.

Ordinarily, both lanthanum aluminate and strontium titanate are excellent insulators, meaning that they don't conduct electrical current. But physicists had speculated that if the lanthanum aluminate gets thick enough, its electrical potential would increase to the point that some electrons would have to move from the top of the material to the bottom, to prevent what's called a "polarization catastrophe." The result is a conductive channel at the juncture with the strontium titanate -- much like the one that forms when a transistor is switched on. So Ashoori and his collaborators decided to measure the capacitance between that channel and a gate electrode on top of the lanthanum aluminate.

They were amazed by what they found: Although their results were somewhat limited by their experimental apparatus, it may be that an infinitesimal change in voltage will cause a large amount of charge to enter the channel between the two materials. "The channel may suck in charge -- shoomp! Like a vacuum," Ashoori says. "And it operates at room temperature, which is the thing that really stunned us."

Indeed, the material's capacitance is so high that the researchers don't believe it can be explained by existing physics. "We've seen the same kind of thing in semiconductors," Ashoori says, "but that was a very pure sample, and the effect was very small. This is a super-dirty sample and a super-big effect." It's still not clear, Ashoori says, just why the effect is so big: "It could be a new quantum-mechanical effect or some unknown physics of the material."

There is one drawback to the system that the researchers investigated: While a lot of charge will move into the channel between materials with a slight change in voltage, it moves slowly -- much too slowly for the type of high-frequency switching that takes place in computer chips. That could be because the samples of the material are, as Ashoori says, "super dirty"; purer samples might exhibit less electrical resistance. But it's also possible that, if researchers can understand the physical phenomena underlying the material's remarkable capacitance, they may be able to reproduce them in more practical materials.

Triscone cautions that wholesale changes to the way computer chips are manufactured will inevitably face resistance. "So much money has been injected into the semiconductor industry for decades that to do something new, you need a really disruptive technology," he says.

"It's not going to revolutionize electronics tomorrow," Ashoori agrees. "But this mechanism exists, and once we know it exists, if we can understand what it is, we can try to engineer it."

Story Source:

The above story is reprinted (with editorial adaptations by ScienceDaily staff) from materials provided by Massachusetts Institute of Technology. The original article was written by Larry Hardesty, MIT News Office.

Journal Reference:

L. Li, C. Richter, S. Paetel, T. Kopp, J. Mannhart, R. C. Ashoori. Very Large Capacitance Enhancement in a Two-Dimensional Electron System. Science, 2011; 332 (6031): 825 DOI: 10.1126/science.1204168

Note: If no author is given, the source is cited instead.

Disclaimer: Views expressed in this article do not necessarily reflect those of ScienceDaily or its staff.

View the original article here

Toward faster transistors: Physicists discover physical phenomenon that could boost computers' clock speed

ScienceDaily (May 15, 2011) — In the 1980s and '90s, competition in the computer industry was all about "clock speed" -- how many megahertz, and ultimately gigahertz, a chip could boast. But clock speeds stalled out almost 10 years ago: Chips that run faster also run hotter, and with existing technology, there seems to be no way to increase clock speed without causing chips to overheat.

In this week's issue of the journal Science, MIT researchers and their colleagues at the University of Augsburg in Germany report the discovery of a new physical phenomenon that could yield transistors with greatly enhanced capacitance -- a measure of the voltage required to move a charge. And that, in turn, could lead to the revival of clock speed as the measure of a computer's power.

In today's computer chips, transistors are made from semiconductors, such as silicon. Each transistor includes an electrode called the gate; applying a voltage to the gate causes electrons to accumulate underneath it. The electrons constitute a channel through which an electrical current can pass, turning the semiconductor into a conductor.

Capacitance measures how much charge accumulates below the gate for a given voltage. The power that a chip consumes, and the heat it gives off, are roughly proportional to the square of the gate's operating voltage. So lowering the voltage could drastically reduce the heat, creating new room to crank up the clock.

MIT Professor of Physics Raymond Ashoori and Lu Li, a postdoc and Pappalardo Fellow in his lab -- together with Christoph Richter, Stefan Paetel, Thilo Kopp and Jochen Mannhart of the University of Augsburg -- investigated the unusual physical system that results when lanthanum aluminate is grown on top of strontium titanate. Lanthanum aluminate consists of alternating layers of lanthanum oxide and aluminum oxide. The lanthanum-based layers have a slight positive charge; the aluminum-based layers, a slight negative charge. The result is a series of electric fields that all add up in the same direction, creating an electric potential between the top and bottom of the material.

Ordinarily, both lanthanum aluminate and strontium titanate are excellent insulators, meaning that they don't conduct electrical current. But physicists had speculated that if the lanthanum aluminate gets thick enough, its electrical potential would increase to the point that some electrons would have to move from the top of the material to the bottom, to prevent what's called a "polarization catastrophe." The result is a conductive channel at the juncture with the strontium titanate -- much like the one that forms when a transistor is switched on. So Ashoori and his collaborators decided to measure the capacitance between that channel and a gate electrode on top of the lanthanum aluminate.

They were amazed by what they found: Although their results were somewhat limited by their experimental apparatus, it may be that an infinitesimal change in voltage will cause a large amount of charge to enter the channel between the two materials. "The channel may suck in charge -- shoomp! Like a vacuum," Ashoori says. "And it operates at room temperature, which is the thing that really stunned us."

Indeed, the material's capacitance is so high that the researchers don't believe it can be explained by existing physics. "We've seen the same kind of thing in semiconductors," Ashoori says, "but that was a very pure sample, and the effect was very small. This is a super-dirty sample and a super-big effect." It's still not clear, Ashoori says, just why the effect is so big: "It could be a new quantum-mechanical effect or some unknown physics of the material."

There is one drawback to the system that the researchers investigated: While a lot of charge will move into the channel between materials with a slight change in voltage, it moves slowly -- much too slowly for the type of high-frequency switching that takes place in computer chips. That could be because the samples of the material are, as Ashoori says, "super dirty"; purer samples might exhibit less electrical resistance. But it's also possible that, if researchers can understand the physical phenomena underlying the material's remarkable capacitance, they may be able to reproduce them in more practical materials.

Triscone cautions that wholesale changes to the way computer chips are manufactured will inevitably face resistance. "So much money has been injected into the semiconductor industry for decades that to do something new, you need a really disruptive technology," he says.

"It's not going to revolutionize electronics tomorrow," Ashoori agrees. "But this mechanism exists, and once we know it exists, if we can understand what it is, we can try to engineer it."

Story Source:

The above story is reprinted (with editorial adaptations by ScienceDaily staff) from materials provided by Massachusetts Institute of Technology. The original article was written by Larry Hardesty, MIT News Office.

Journal Reference:

L. Li, C. Richter, S. Paetel, T. Kopp, J. Mannhart, R. C. Ashoori. Very Large Capacitance Enhancement in a Two-Dimensional Electron System. Science, 2011; 332 (6031): 825 DOI: 10.1126/science.1204168

Note: If no author is given, the source is cited instead.

Disclaimer: Views expressed in this article do not necessarily reflect those of ScienceDaily or its staff.

View the original article here